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Bug
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Resolution: Done-Errata
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Normal
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None
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4.14
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No
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CNF RAN Sprint 241, CNF Compute Sprint 242
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2
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False
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Description of problem:
DPLL: clock class hould be set to 140 or 150 when source is lost and out of spec as per this design documern https://docs.google.com/document/d/1vZXWEWtrDhkiXciID9qBfdMMmMsKEvFFjSHJ2B2WddM/edit
Version-Release number of selected component (if applicable):
How reproducible:
Set following values under plugin/e810/settings
LocalMaxHoldoverOffSet: 2000
LocalHoldoverTimeout: 100
MaxInSpecOffset: 100
Steps to Reproduce:
1. 2. 3.
Actual results:
Expected results:
Additional info:
- links to
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RHEA-2023:5006 rpm
- mentioned in
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